It is known that in certain manufacturing processes, treatments of silicon wafers, in which electronic devices are formed, generate electrical potentials on the wafer which may damage the active dielectrics of the electronic components being manufactured. In particular, the thin layers of silicon dioxide which form the gate dielectrics of MOS field-effect transistors and the gate dielectrics of cells of programmable non-volatile memories, for example, EPROM, EEPROM and "flash" memories, may be damaged. This may result in the production of electronic components whose electrical characteristics are degraded with respect to those theoretically obtainable. The treatments most responsible for this damage are those which require the use of plasmas for dry etching or for certain operations of chemical deposition from the vapor phase (plasma enhanced CVD).
To repair such damage, a known method of using high-temperature annealing treatments has been used. However, it is not always possible to use sufficiently high temperatures to ensure the restoration of the properties of the dielectrics. Indeed, in practically all processes, it is necessary to form on the substrate at least one layer of material which sets a maximum limit to the temperatures which can be used in the subsequent operations. A case in point is that of the layers of aluminum required to form interconnecting paths on one or more levels; these impose a temperature limit of approximately 450.degree. C.
It is also known that certain annealing treatments are sufficiently effective, even at relatively low temperatures. For example, certain defects of the dielectrics of MOS devices at the interface with the substrate can be largely eliminated by heating to 400.degree.-450.degree. C. in a hydrogen-containing atmosphere. The defects in question are those caused by silicon atoms which have a free bond at the interface with the dielectric and therefore tend to trap electrons. This causes a change in the theoretical electrical characteristics of the devices, for example, an increase in the threshold voltage of MOS transistors with respect to the design value. With the aforesaid treatment, within the stated temperature range the hydrogen reacts with the silicon atoms with a free bond to saturate the states at the interface between dielectric and silicon and impede the trapping of electrons.
It has been found that this annealing treatment, although effective in MOS transistors, enabling threshold voltage values very close to the theoretical values to be obtained does not have the same effect on floating-gate non-volatile memory cells, although these are structurally and functionally similar to MOS transistors, particularly in cells whose control gate electrodes are connected to particularly long connecting paths. Indeed, if the threshold voltage of a memory cell is measured after the annealing treatment described above and after an appropriate erasure treatment by ultraviolet (UV) radiation, which has the purpose of rebalancing any excess charges in the floating-gate electrode caused by the manufacturing process, values higher than those expected according to the design parameters are found. These results have been documented, for example, in the article by H. Fang et al., in International Electronic Device Meeting, 1994, page 467.
Therefore, what is needed is an improvement to the manufacturing process of a floating-gate non-volatile memory with memory cells to avoid the aforementioned prior art problems so that the memory cells may have threshold voltage values equal, or at least very close, to the theoretical values.